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miaobiao
- VHDL语言实现的秒表设计，具有分秒，计数清零等功能-VHDL language implementation of the stopwatch design, with the minutes and seconds, counting functions such as Clear
Design_of_multi-functional_sports_stopwatch
- 设计一个可以顺计时和倒计时的秒表。要求计时的范围为00.0S~99.9S，用三位数码管显示。用VHDL语言-Designed to be a cis-timing and countdown stopwatch. Required time ranges from 00.0S ~ 99.9S, with three digital tube display.
mb
- 简单秒表(1分钟)，希望对初学者有帮助，VHDL-Simple stopwatch (1 minute), want to be helpful for beginners, VHDL
VHDLscounter
- 通过VHDL自行设计的一个秒表共有4个输出显示，分别为、十分之一秒、秒、十秒、分，所以共有4个计数器与之相对应（3个十进制计数器，一个6进制计数器用来对十秒进行计数），整个秒表还需有一个复位信号和一个精确的10HZ时钟信号。-Of a self-designed by VHDL stopwatch showed a total of four outputs, namely, one-tenth of seconds, seconds, ten seconds, minutes, so a to
startwatch1
- 利用VHDL硬件描述语言实现 一个秒表设计，其中有5个VHDL文件。startwatch为顶层文件-The use of VHDL hardware descr iption language designed to achieve a stopwatch, of which five VHDL files. startwatch for the top-level files
CANDY1
- 用VHDL实现的数字钟，实现消抖，计时，显示分秒，秒表等功能-VHDL implementation with digital clock and realize elimination shake, timing, displays minutes and seconds, stopwatch functions
VHDLforclock
- 用VHDL编写电子时钟芯片，具有整点报时，闹钟，秒表功能，调时可按十分与个位分别调时-The preparation of electronic clock chip with VHDL, with the whole point timekeeping, alarm clock, stopwatch function, can be transferred when the transfer is with a bit difference when the
electricwatch
- 用VHDL语言设计多功能的电子表。实现基本电子表的时间显示、闹钟、秒表等功能-VHDL language design with multi-functional electronic watch. The time table to achieve basic electronic display, alarm clock, stopwatch functions
b
- 基于VHDL的数字时钟设计与实现。。。。可以实现时钟，秒表-VHDL-based Design and Implementation of Digital clock. . . . Can achieve clock, stopwatch. .
biao
- 用VHDL 描述的 “秒表"程序设计-Described using VHDL programming stopwatch
5
- 基于FPGA的数字秒表的VHDL设计,论文,有主要程序-FPGA-based VHDL design digital stopwatch, paper, a major program
3
- 】文章介绍了用于体育比赛的数字秒表的VHDL 设计, 并基于FPGA 在MAXPLUS2 软件下, 采用ALTRA 公司FLEX10K 系列的EPF10K10LC84- 4 芯片进行了计算机仿真-】 This article introduces digital stopwatch for sports competition in the VHDL design and FPGA-based software in MAXPLUS2, using ALTRA company FLEX10K
miaobiao
- vhdl实现秒表，功能包括计时、冻结时间显示、暂停-vhdl implementation stopwatch functions, including time, freezing time display, pause
stop_watch_with_doc
- vhdl code for stopwatch
counter
- Counter for VHDL. I have made a 3 bit COunter for my stopwatch project. -Counter for VHDL. I have made a 3 bit COunter for my stopwatch project.
miaobiao
- 用VHDL实现的秒表功能，包括分频器，动态显示模块-VHDL implementation with stopwatch functions, including crossover, dynamic display module
shuzimiaobiao
- 秒表设计中的分块模块的设计，运用VHDL语言编写-Stopwatch design block module design, the use of VHDL language
watch
- 本文件为电子设计而开发的多功能数字钟VHDL语言完整源代码 --该数字钟实现的功能有时间，秒表，闹钟，年月日的显示设置等 -This document is multi-functional electronic design and development of a complete VHDL, digital clock source code- the digital clock function can be achieved time, stopwatch, alarm clo
digital_clock
- 用VHDL语言实现常用的数字秒表，并在Sparten3E FPGA上运行通过。-VHDL language commonly used with a digital stopwatch, and Sparten3E FPGA run through.
second
- 在QuarterII环境下开发 应用VHDL语言编写的秒表程序 能够用于计时-Development and application environment in QuarterII VHDL program can be written in stopwatch for timing